AOS TFT Mobility Limits Considerations
Kevin A. Stewart and John F. Wager
School of EECS, Oregon State University, Corvallis, Oregon, 97331-5501 U.S.A.
E-mail:
Phone: 541-740-8865
The display industry appears to have an insatiable desire for increasing semiconductor
mobility. This is also true of the integrated circuit industry. This display industry desire is
motivated by the trends towards higher resolution, higher refresh rate AMLCDs as well as the
emergence of AMOLED displays as all these technologies require TFTs with higher drive
currents. There are several reports in the literature of single layer AOS or nanocrystalline
TFTs with a (n-channel) mobility of 100-300 cm
2
V
-1
s
-1
. However, these very high mobility
results are likely a consequence of measurement artifacts associated with employing a leaky
gate insulator, not properly accounting for hysteresis, peripheral current flow in an
unpatterned-channel TFT, depletion-mode operation, and/or simple incorrect calculation of
the mobility.
In order to attempt to restore a bit of rationality into the discussion of AOS TFT
mobility, a physics-based model for carrier transport in an amorphous semiconductor is
developed to estimate the mobility limits of AOS TFTs. The model involves band tail state
trapping of a diffusive mobility. Simulation reveals a strong dependence on the band tail
density of states. This consideration makes it difficult to realize a high-performance p-type
oxide.
The conduction and valence band for a-Si:H are derived from sp
3
hybridized orbitals.
AOS s-orbitals forming the conduction band are large, spherically symmetrical, and relatively
insensitive to disorder compared to p-orbitals which are highly directional. We note that
disorder increases with increasing p-bonding character and the Urbach energy and band tail
density of states increase with increasing disorder. In fact, the magnitude of the Urbach
energy is a good indicator of the amount of disorder in an amorphous semiconductor.
For our transport simulations only the temperature and three material parameters, the
effective mass, m
*
e
(m
*
h
), the peak density of band tail states, N
TA
(N
TD
), and the band tail
slope, W
TA
(W
TD
) need to be specified for the n-type (p-type) case. Using this model the
simulated maximum mobility for the well-known amorphous semiconductors a-Si:H and a-
IGZO agrees very well with experimental results from the literature. Based on device physics
simulation and fundamental material limitations we propose an upper bound limit for electron
and hole mobility in AOS TFTs. Our best-case estimates of m*
e
≈ 0.1, N
TA
≈ 1x10
19
cm
-3
eV
-
1
, W
TA
≈ 10 meV (m*
h
≈ 0.3, N
TD
≈ 1x10
20
cm
-3
eV
-1
, W
TD
≈ 30 meV) correspond to a
maximum mobility of 71 cm
2
V
-1
s
-1
(16 cm
2
V
-1
s
-1
) for electrons (holes). We think that these
considerations are relevant to the roadmap for future oxide TFT research and development.
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